IJATSER Volume 2 – Issue 2, January 2017 Edition

All listed papers are published after full consent of respective author or co-author(s).
For any discussion on research subject or research matter, the reader should directly contact to undersigned authors.

IIJ Jan 01Comparative Study of Clock Gating Techniques for the Design of Arithmetic and Logic Unit

AUTHORS : Priyanka Thakre, Nitesh Dodkey, Siddarth Singh Parihar

Abstract— This is an era of devices which can be held in hands like cell phones, and personal digital assistants. Since processors can
be embedded in these devices this has became possible. The two parameters which are very important in the design of these systems are
there operating speeds and standby time. This paper presents a comparative study on different clock gating technique to reduce
dynamic power consumption.
Keywords— Clock gating, dynamic power consumption, FPGA



AUTHORS : Bhagwandas Gadre , Mr. Abhishek Bhandari

ABSTRACT: The purpose of the experiment is to find better motive of this study is to identify maximum energy loss areas in any thermal power stations and generate a plan to reduce them using energy and exergy analysis as the tools. The energy sources are decreasing down day by day around the world due to the growing demand and sometimes due to ageing of machinery.the enervative ideas to reduce losses of boiler and improve boiler efficiency by using the variation of boiler load and also percentage of excess air. We are conclude the following point which points show in thesis and by using of heat balance sheet clearly indicate unnecessary loss of heat. Give some ideas to reduce unnecessary loses and improve boiler efficiency.


IIJ Jan 03: Techno‐economic feasibility of biomass gasifier and solar PV hybrid energy systems for off‐grid rural electrification in India

AUTHORS : Pankaj Kumar Tiwari, Prof. Ashish Bhargava

ABSTRACT : In this paper techno-economic feasibility of biomass gasifier and solar PV hybrid energy systems for off-grid rural electrification in India. Proposed village Rapadiya and its load profile has been estimated. The data regarding solar radiation of the village throughout the year has also been collected. Based on these background data, the system is optimized using HOMER software, subjected to various constraints, and optimal sizing of the system components have been chosen so as to minimize the per unit cost. The most feasible HES consists of a 8 kW downdraft biomass gasifier set per year power generation 26386 kW, 16 kW solar photovoltaic per year power generation 28510 kW .total power generation 54896 kW per year with to obtain the minimum total net present cost and cost of energy with zero percent capacity shortage.20 years cost analysis of HES different component.Solar The NPC of the HES and CoE are 61494 $, 0.117$/kWh .

Keywords: Biomass gasifier, Solar PV, Optimization, Hybrid Energy System.


IIJ Jan 04: A Survey on Soft Processors

AUTHORS :  Payal sakre ,Nitesh Dodkey, Siddarth singh parihar

Abstract— Embedded systems are characterized by small size, high speed and minimum power requirements. Apart from satisfying these characteristics, the embedded products need to meet some design metrics viz. time to prototype, time to market, Non Recurring Engineering (NRE) Cost. So as to meet some of these requirements and to speed up the process of hardware-software co-design, soft CPU cores are made available by different manufacturers. This has simplified the job of an embedded product designer to a great extent. Soft-core processors play a vital role due to their ease of usage. Soft-core processors have advantages like reduced cost, flexibility, platform independence and greater immunity to obsolescence over their hard-core counterparts. The soft CPUs come with different features. Some soft CPUs are open source while others are proprietary; some are of RISC category while others are of CISC type. Based on product development requirements, an appropriate soft CPU core could be selected. This paper presents review on features of a few soft core processors, which are popular in the embedded development market.

Keywords—FPGA, Soft Processors, MIPS architecture


IIJ Jan 05A Review on Entropy Encoding

AUTHORS : Priyanka Pawar, Nitesh Dodkey, Siddharth Singh Parihar

Abstract—in this paper entropy based loss less data compression techniques are discussed, four entropy encoding schemes are discussed namely: first order entropy based encoding, zero run length encoding, Huffman encoding and counter based entropy technique. It is found out that when the data entropy is monotonically decreasing then , counter based entropy scheme is best in terms of compression ratio and Huffman encoding scheme is suited for all entropy rates.

Keywords— Rice algorithm, PSI1,k, Entropy Encoding, FPGA